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<div class="subsection-level-extent" id="AArch64-Function-Attributes">
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Next: <a href="AMD-GCN-Function-Attributes.html" accesskey="n" rel="next">AMD GCN Function Attributes</a>, Previous: <a href="Common-Function-Attributes.html" accesskey="p" rel="prev">Common Function Attributes</a>, Up: <a href="Function-Attributes.html" accesskey="u" rel="up">Declaring Attributes of Functions</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html" title="Index" rel="index">Index</a>]</p>
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<hr>
<h4 class="subsection" id="AArch64-Function-Attributes-1"><span>6.33.2 AArch64 Function Attributes<a class="copiable-link" href="#AArch64-Function-Attributes-1"> &para;</a></span></h4>

<p>The following target-specific function attributes are available for the
AArch64 target.  For the most part, these options mirror the behavior of
similar command-line options (see <a class="pxref" href="AArch64-Options.html">AArch64 Options</a>), but on a
per-function basis.
</p>
<dl class="table">
<dt><a id="index-general_002dregs_002donly-function-attribute_002c-AArch64"></a><span><code class="code">general-regs-only</code><a class="copiable-link" href="#index-general_002dregs_002donly-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Indicates that no floating-point or Advanced SIMD registers should be
used when generating code for this function.  If the function explicitly
uses floating-point code, then the compiler gives an error.  This is
the same behavior as that of the command-line option
<samp class="option">-mgeneral-regs-only</samp>.
</p>
</dd>
<dt><a id="index-fix_002dcortex_002da53_002d835769-function-attribute_002c-AArch64"></a><span><code class="code">fix-cortex-a53-835769</code><a class="copiable-link" href="#index-fix_002dcortex_002da53_002d835769-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Indicates that the workaround for the Cortex-A53 erratum 835769 should be
applied to this function.  To explicitly disable the workaround for this
function specify the negated form: <code class="code">no-fix-cortex-a53-835769</code>.
This corresponds to the behavior of the command line options
<samp class="option">-mfix-cortex-a53-835769</samp> and <samp class="option">-mno-fix-cortex-a53-835769</samp>.
</p>
</dd>
<dt><a id="index-cmodel_003d-function-attribute_002c-AArch64"></a><span><code class="code">cmodel=</code><a class="copiable-link" href="#index-cmodel_003d-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Indicates that code should be generated for a particular code model for
this function.  The behavior and permissible arguments are the same as
for the command line option <samp class="option">-mcmodel=</samp>.
</p>
</dd>
<dt><a id="index-strict_002dalign-function-attribute_002c-AArch64"></a><span><code class="code">strict-align</code><a class="copiable-link" href="#index-strict_002dalign-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dt><code class="code">no-strict-align</code></dt>
<dd><p><code class="code">strict-align</code> indicates that the compiler should not assume that unaligned
memory references are handled by the system.  To allow the compiler to assume
that aligned memory references are handled by the system, the inverse attribute
<code class="code">no-strict-align</code> can be specified.  The behavior is same as for the
command-line option <samp class="option">-mstrict-align</samp> and <samp class="option">-mno-strict-align</samp>.
</p>
</dd>
<dt><a id="index-omit_002dleaf_002dframe_002dpointer-function-attribute_002c-AArch64"></a><span><code class="code">omit-leaf-frame-pointer</code><a class="copiable-link" href="#index-omit_002dleaf_002dframe_002dpointer-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Indicates that the frame pointer should be omitted for a leaf function call.
To keep the frame pointer, the inverse attribute
<code class="code">no-omit-leaf-frame-pointer</code> can be specified.  These attributes have
the same behavior as the command-line options <samp class="option">-momit-leaf-frame-pointer</samp>
and <samp class="option">-mno-omit-leaf-frame-pointer</samp>.
</p>
</dd>
<dt><a id="index-tls_002ddialect_003d-function-attribute_002c-AArch64"></a><span><code class="code">tls-dialect=</code><a class="copiable-link" href="#index-tls_002ddialect_003d-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Specifies the TLS dialect to use for this function.  The behavior and
permissible arguments are the same as for the command-line option
<samp class="option">-mtls-dialect=</samp>.
</p>
</dd>
<dt><a id="index-arch_003d-function-attribute_002c-AArch64"></a><span><code class="code">arch=</code><a class="copiable-link" href="#index-arch_003d-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Specifies the architecture version and architectural extensions to use
for this function.  The behavior and permissible arguments are the same as
for the <samp class="option">-march=</samp> command-line option.
</p>
</dd>
<dt><a id="index-tune_003d-function-attribute_002c-AArch64"></a><span><code class="code">tune=</code><a class="copiable-link" href="#index-tune_003d-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Specifies the core for which to tune the performance of this function.
The behavior and permissible arguments are the same as for the <samp class="option">-mtune=</samp>
command-line option.
</p>
</dd>
<dt><a id="index-cpu_003d-function-attribute_002c-AArch64"></a><span><code class="code">cpu=</code><a class="copiable-link" href="#index-cpu_003d-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Specifies the core for which to tune the performance of this function and also
whose architectural features to use.  The behavior and valid arguments are the
same as for the <samp class="option">-mcpu=</samp> command-line option.
</p>
</dd>
<dt><a id="index-sign_002dreturn_002daddress-function-attribute_002c-AArch64"></a><span><code class="code">sign-return-address</code><a class="copiable-link" href="#index-sign_002dreturn_002daddress-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Select the function scope on which return address signing will be applied.  The
behavior and permissible arguments are the same as for the command-line option
<samp class="option">-msign-return-address=</samp>.  The default value is <code class="code">none</code>.  This
attribute is deprecated.  The <code class="code">branch-protection</code> attribute should
be used instead.
</p>
</dd>
<dt><a id="index-branch_002dprotection-function-attribute_002c-AArch64"></a><span><code class="code">branch-protection</code><a class="copiable-link" href="#index-branch_002dprotection-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Select the function scope on which branch protection will be applied.  The
behavior and permissible arguments are the same as for the command-line option
<samp class="option">-mbranch-protection=</samp>.  The default value is <code class="code">none</code>.
</p>
</dd>
<dt><a id="index-outline_002datomics-function-attribute_002c-AArch64"></a><span><code class="code">outline-atomics</code><a class="copiable-link" href="#index-outline_002datomics-function-attribute_002c-AArch64"> &para;</a></span></dt>
<dd><p>Enable or disable calls to out-of-line helpers to implement atomic operations.
This corresponds to the behavior of the command line options
<samp class="option">-moutline-atomics</samp> and <samp class="option">-mno-outline-atomics</samp>.
</p>
</dd>
</dl>

<p>The above target attributes can be specified as follows:
</p>
<div class="example smallexample">
<pre class="example-preformatted">__attribute__((target(&quot;<var class="var">attr-string</var>&quot;)))
int
f (int a)
{
  return a + 5;
}
</pre></div>

<p>where <code class="code"><var class="var">attr-string</var></code> is one of the attribute strings specified above.
</p>
<p>Additionally, the architectural extension string may be specified on its
own.  This can be used to turn on and off particular architectural extensions
without having to specify a particular architecture version or core.  Example:
</p>
<div class="example smallexample">
<pre class="example-preformatted">__attribute__((target(&quot;+crc+nocrypto&quot;)))
int
foo (int a)
{
  return a + 5;
}
</pre></div>

<p>In this example <code class="code">target(&quot;+crc+nocrypto&quot;)</code> enables the <code class="code">crc</code>
extension and disables the <code class="code">crypto</code> extension for the function <code class="code">foo</code>
without modifying an existing <samp class="option">-march=</samp> or <samp class="option">-mcpu</samp> option.
</p>
<p>Multiple target function attributes can be specified by separating them with
a comma.  For example:
</p><div class="example smallexample">
<pre class="example-preformatted">__attribute__((target(&quot;arch=armv8-a+crc+crypto,tune=cortex-a53&quot;)))
int
foo (int a)
{
  return a + 5;
}
</pre></div>

<p>is valid and compiles function <code class="code">foo</code> for ARMv8-A with <code class="code">crc</code>
and <code class="code">crypto</code> extensions and tunes it for <code class="code">cortex-a53</code>.
</p>
<ul class="mini-toc">
<li><a href="#Inlining-rules" accesskey="1">Inlining rules</a></li>
</ul>
<div class="subsubsection-level-extent" id="Inlining-rules">
<h4 class="subsubsection"><span>6.33.2.1 Inlining rules<a class="copiable-link" href="#Inlining-rules"> &para;</a></span></h4>
<p>Specifying target attributes on individual functions or performing link-time
optimization across translation units compiled with different target options
can affect function inlining rules:
</p>
<p>In particular, a caller function can inline a callee function only if the
architectural features available to the callee are a subset of the features
available to the caller.
For example: A function <code class="code">foo</code> compiled with <samp class="option">-march=armv8-a+crc</samp>,
or tagged with the equivalent <code class="code">arch=armv8-a+crc</code> attribute,
can inline a function <code class="code">bar</code> compiled with <samp class="option">-march=armv8-a+nocrc</samp>
because the all the architectural features that function <code class="code">bar</code> requires
are available to function <code class="code">foo</code>.  Conversely, function <code class="code">bar</code> cannot
inline function <code class="code">foo</code>.
</p>
<p>Additionally inlining a function compiled with <samp class="option">-mstrict-align</samp> into a
function compiled without <code class="code">-mstrict-align</code> is not allowed.
However, inlining a function compiled without <samp class="option">-mstrict-align</samp> into a
function compiled with <samp class="option">-mstrict-align</samp> is allowed.
</p>
<p>Note that CPU tuning options and attributes such as the <samp class="option">-mcpu=</samp>,
<samp class="option">-mtune=</samp> do not inhibit inlining unless the CPU specified by the
<samp class="option">-mcpu=</samp> option or the <code class="code">cpu=</code> attribute conflicts with the
architectural feature rules specified above.
</p>
</div>
</div>
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Next: <a href="AMD-GCN-Function-Attributes.html">AMD GCN Function Attributes</a>, Previous: <a href="Common-Function-Attributes.html">Common Function Attributes</a>, Up: <a href="Function-Attributes.html">Declaring Attributes of Functions</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html" title="Index" rel="index">Index</a>]</p>
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